It does get easier, honest

After designing 3 boards (well, actually one of those was a complete redesign after a failed attempt) with Eagle CAD, I have re-learned it's crazy interface.  The fourth board I did today in about 3 hours, from beginning the schematic capture to completing the board layout including passing DRC, and even the silk screen layer done.

Doing it wrong is progress

I spent a day working on the partitioning of the system, mapping functions to pins, and sketching the mechanical arrangement of the boards, display, touch panel, and radio.  System level design work.

Re-learning Eagle CAD

Eagle CAD's free version of schematic capture and board layout is a great tool for hobbyists. Full featured, lots of parts libraries available, and it does a decent enough job for designs that will fit on a 2-layer board up to 4 x 3 inches.

But the user interface is arcane. It takes me a day to remember how to use the darn thing when I haven't used it for a couple months. Yesterday, I spent 2 hours on a 1 page schematic. That was easily twice what it should have taken, but I was re-learning the UI.

Things that eat up time

Atmel's AT42QT2160 uses a 28-lead QFN/MLF package. The datasheet for this part doesn't have package dimensions! So I searched around and found that their ATmega168PA/328P also comes in the same package. But that datasheet has dimensions for for a 20-pin QFN (which the 168P does not even come in). Thanks Atmel, you are a ton of help today.

So after wasting time searching, I'm stuck calculating what I hope are the 28-pin package dimensions, and if I'm wrong, eventually I'll be wasting a LOT of time redesigning my board.

RF design tradeoffs

Well, more like architectural tradeoffs.

I've looked at the Atmel AT86RF212 datasheet and some example code, and compared that to the RFM12B datasheet and the code in the RF12 library used in the JeeNode. I believe I could fairly quickly port the RF12 library to use Atmel's part. Some features, like a fast SPI interface and 128-byte TX/RX FIFO will make the Atmel device easier to use than the RFM12B. Not easier to port, but easier to use in my application code.

But, and this is a big but, I am worried about the time needed to debug the code. Debugging wireless is hard. Of course, I don't have to debug it before the paper design is due in 30 27 days. It just has to simulate.

Yes, that's right, 10% of my design time gone, and I haven't even made a decision on the wireless solution.

I'm going to move on to other parts of the system. Design and code those, then see how much time is left before the deadline. I have a feeling that I'll have to go with Raven modules due to time constraints.

Atmel Smart RF

First step: figure out what I'm going to use for wireless.

I need to keep in mind the goals: use as many Atmel components as possible, keep cost low, and minimize power consumption.

Atmel Arrow Smart Design Challenge

I submitted a design proposal to Atmel's AVR design contest back in October. The grand prize is a Smart Car. I figured winning a new car would be fun.

On Friday, they notified me that I had made it into the semi-finals, along with up to 100 other entries.